On Mon, Feb 17, 2020 at 12:35:12PM +0000, Pankaj Bansal wrote:

quoted

-----Original Message-----
From: Lorenzo Pieralisi <redacted>
Sent: Friday, February 14, 2020 11:20 PM
To: Pankaj Bansal <redacted>
Cc: Marc Zyngier <maz@kernel.org>; Ard Biesheuvel
[off-list ref]; Makarand Pawagi [off-list ref];
Calvin Johnson [off-list ref]; stuyoder@gmail.com;
nleeder@codeaurora.org; Ioana Ciornei [off-list ref]; Cristi
Sovaiala [off-list ref]; Hanjun Guo [off-list ref];
Will Deacon [off-list ref]; jon@solid-run.com; Russell King
[off-list ref]; ACPI Devel Maling List [off-list ref];
Len Brown [off-list ref]; Jason Cooper [off-list ref]; Andy
Wang [off-list ref]; Varun Sethi [off-list ref]; Thomas
Gleixner [off-list ref]; linux-arm-kernel <linux-arm-
kernel@lists.infradead.org>; Laurentiu Tudor [off-list ref]; Paul
Yang [off-list ref]; netdev@vger.kernel.org; Rafael J. Wysocki
[off-list ref]; Linux Kernel Mailing List [off-list ref];
Shameerali Kolothum Thodi [off-list ref];
Sudeep Holla [off-list ref]; Robin Murphy
[off-list ref]
Subject: Re: [EXT] Re: [PATCH] bus: fsl-mc: Add ACPI support for fsl-mc

On Fri, Feb 14, 2020 at 04:35:10PM +0000, Pankaj Bansal wrote:

[...]

quoted

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-----Original Message-----
From: Lorenzo Pieralisi <redacted>
Sent: Friday, February 14, 2020 9:50 PM
To: Pankaj Bansal <redacted>
Cc: Marc Zyngier <maz@kernel.org>; Ard Biesheuvel
[off-list ref]; Makarand Pawagi

[off-list ref];

quoted

quoted

Calvin Johnson [off-list ref]; stuyoder@gmail.com;
nleeder@codeaurora.org; Ioana Ciornei [off-list ref]; Cristi
Sovaiala [off-list ref]; Hanjun Guo

[off-list ref];

quoted

quoted

Will Deacon [off-list ref]; jon@solid-run.com; Russell King
[off-list ref]; ACPI Devel Maling List <linux-

acpi@vger.kernel.org>;

quoted

quoted

Len Brown [off-list ref]; Jason Cooper [off-list ref];

Andy

quoted

quoted

Wang [off-list ref]; Varun Sethi [off-list ref]; Thomas
Gleixner [off-list ref]; linux-arm-kernel <linux-arm-
kernel@lists.infradead.org>; Laurentiu Tudor [off-list ref];

Paul

quoted

quoted

Yang [off-list ref]; netdev@vger.kernel.org; Rafael J. Wysocki
[off-list ref]; Linux Kernel Mailing List <linux-

kernel@vger.kernel.org>;

quoted

quoted

Shameerali Kolothum Thodi [off-list ref];
Sudeep Holla [off-list ref]; Robin Murphy
[off-list ref]
Subject: Re: [EXT] Re: [PATCH] bus: fsl-mc: Add ACPI support for fsl-mc

Side note: would you mind removing the email headers (as above) in your
replies please ?

Read the question above please.

[...]

quoted

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As stated above, in Linux MC is a bus (just like PCI bus, AMBA bus etc)
There can be multiple devices attached to this bus. Moreover, we can

dynamically create/destroy these devices.

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Now, we want to represent this BUS (not individual devices connected to bus)

in IORT table.

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The only possible way right now we see is that we describe it as Named

components having a pool of ID mappings.

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As and when devices are created and attached to bus, we sift through this pool

to correctly determine the output ID for the device.

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Now the input ID that we provide, can come from device itself.
Then we can use the Platform MSI framework for MC bus devices.

So are you asking me if that's OK ? Or there is something you can't
describe with IORT ?

I am asking if that would be acceptable?
i.e. we represent MC bus as Named component is IORT table with a pool of IDs (without single ID mapping flag)
and then we use the Platform MSI framework for all children devices of MC bus.
Note that it would require the Platform MSI layer to correctly pass an input id for a platform device to IORT layer.

How is this solved in DT ? You don't seem to need any DT binding on top
of the msi-parent property, which is equivalent to IORT single mappings
AFAICS so I would like to understand the whole DT flow (so that I
understand how this FSL bus works) before commenting any further.

And IORT layer ought to retrieve the output id based on single ID mapping flag as well as input id.

quoted

Side note: can you explain to me please how the MSI allocation flow
and kernel data structures/drivers are modeled in DT ? I had a quick
look at:

drivers/irqchip/irq-gic-v3-its-fsl-mc-msi.c

and to start with, does that code imply that we create a
DOMAIN_BUS_FSL_MC_MSI on ALL DT systems with an ITS device node ?

Yes. It's being done for all DT systems having ITS node.

This does not seem correct to me, I will let Marc comment on
the matter.

The domain creation is handled in drivers/bus/fsl-mc/fsl-mc-msi.c

Thanks,
Lorenzo

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