Re: [RFC PATCH v2 01/10] dt-bindings: mtd: add rockchip nand controller bindings
From: Rob Herring <robh@kernel.org>
Date: 2020-02-03 15:45:47
Also in:
linux-devicetree, linux-rockchip, lkml
On Fri, Jan 24, 2020 at 05:29:52PM +0100, Johan Jonker wrote:
quoted hunk ↗ jump to hunk
Add the Rockchip NAND controller bindings. Signed-off-by: Johan Jonker <redacted> --- .../bindings/mtd/rockchip,nand-controller.yaml | 92 ++++++++++++++++++++++ 1 file changed, 92 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yamldiff --git a/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml b/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml new file mode 100644 index 000000000..5c725f972 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml@@ -0,0 +1,92 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mtd/rockchip,nand-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip NAND Controller Device Tree Bindings + +allOf: + - $ref: "nand-controller.yaml#" + +maintainers: + - Heiko Stuebner <heiko@sntech.de> + +properties: + compatible: + enum: + - rockchip,px30-nand-controller + - rockchip,rk3066-nand-controller + - rockchip,rk3228-nand-controller + - rockchip,rk3288-nand-controller + - rockchip,rk3308-nand-controller + - rockchip,rk3368-nand-controller + - rockchip,rv1108-nand-controller + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 2 + + clock-names: + minItems: 1 + items: + - const: hclk_nandc + - const: clk_nandc + +patternProperties: + "^nand@[a-f0-9]+$": + type: object + properties: + reg: + minimum: 0 + maximum: 3 + + nand-is-boot-medium: true + + rockchip,idb-res-blk-num:
What is idb? Rather than define, maybe just 'rockchip,boot-blks'?
+ minimum: 2
is there a max?
+ default: 16
+ allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ For legacy devices where the bootrom can only handle 24 bit BCH/ECC.
+ If specified it indicates the number of erase blocks in use by
+ the bootloader that need a lower BCH/ECC setting.
+ Only used in combination with 'nand-is-boot-medium'.
+
+ additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+
+examples:
+ - |
+ #include <dt-bindings/clock/rk3188-cru-common.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ nandc: nand-controller@10500000 {
+ compatible = "rockchip,rk3066-nand-controller";
+ reg = <0x10500000 0x4000>;
+ interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_NANDC0>;
+ clock-names = "hclk_nandc";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ nand@0 {
+ reg = <0>;
+ nand-is-boot-medium;
+ };
+ };
+
+...
--
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