Thread (8 messages) 8 messages, 4 authors, 2020-01-22

Re: [PATCH V3 0/3] Add i.MX6ULZ SoC support

From: Stefan Roese <sr@denx.de>
Date: 2020-01-22 08:39:41

On 30.09.18 09:33, Shawn Guo wrote:
On Sun, Sep 30, 2018 at 11:32:25AM +0800, Anson Huang wrote:
quoted
This patch set adds i.MX6ULZ SoC support, i.MX6ULZ is a new SoC of
i.MX6 family, compared to i.MX6ULL, it removes below modules:

     - UART5/UART6/UART7/UART8;
     - PWM5/PWM6/PWM7/PWM8;
     - eCSPI3/eCSPI4;
     - CAN1/CAN2;
     - FEC1/FEC2;
     - I2C3/I2C4;
     - EPIT2;
     - LCDIF;
     - GPT2;
     - TSC;

And i.MX6ULZ has same soc_id as i.MX6ULL, but SRC_SBMR2 bit[6] is
to differentiate i.MX6ULZ from i.MX6ULL, 1'b1 means i.MX6ULZ and
1'b0 means i.MX6ULL. i.MX6ULZ reuse most of i.MX6UL/i.MX6ULL code,
just add the new CPU type and remove those non-exist modules from dtb.

Anson Huang (3):
   ARM: imx: add i.mx6ulz msl support
   dt-bindings: arm: add compatible for i.MX6ULZ 14x14 EVK board
   ARM: dts: imx: add i.mx6ulz and i.mx6ulz 14x14 evk support
Applied all, thanks.
I'm currently starting work on an i.MX6ULZ custom port, which will use
the EIM interface. While starting the pin-mux configuration for this
board, I noticed that the pinfunc defines available for MX6UL
(imx6ul-pinfunc.h which is used for i.MX6ULL/ULZ as well AFAICT) does
not match the reference manual descriptions for the EIM pin muxing.
One example:

i.MX6UL:  EIM_DATA00 is available on pad LCD_DATA08
i.MX6ULZ: EIM_DATA00 is available on pad GPIO3_IO13
...

My question now: Is a i.MX6ULL/ULZ specific pinfunc.h header available
in any (NXP?) downstream Linux repository?

Thanks,
Stefan

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