Re: [PATCH v10 1/3] arm64: Implement archrandom.h for ARMv8.5-RNG
From: Catalin Marinas <catalin.marinas@arm.com>
Date: 2020-01-16 11:41:08
On Thu, Jan 16, 2020 at 12:10:28PM +0100, Ard Biesheuvel wrote:
On Thu, 16 Jan 2020 at 12:02, Catalin Marinas [off-list ref] wrote:quoted
On Wed, Jan 15, 2020 at 02:23:39PM -1000, Richard Henderson wrote:quoted
On 1/15/20 4:26 AM, Catalin Marinas wrote:quoted
Until the ifunc resolver can work with CPUID, I think we should keep adding HWCAPn bits. We can revisit this with the toolchain people before introducing HWCAP3.Why would the ifunc resolver not be able to use HWCAP_CPUID?It can indeed check the HWCAP_CPUID but I haven't seen any plans to implement the next part, actual use of an MRS instruction to read the corresponding ID_AA64* regs. This MRS emulation was requested by (some of) the toolchain people, even the architecture gained a feature to simplify the emulation, but followed by complete silence from the toolchain folk.But what infrastructure would the toolchain folks need to provide here? An ifunc resolver would simply do void generic_func(...); void foo_func(...); void *resolve_foo(long hwcap) { if (hwcap & HWCAP_CPUID) { long l; asm ("mrs %1, ID_AA64_...") : "=r"(l)); if (l has 'foo') return foo_func; } return generic_func; } so all that is needed for using ID registers to do ifunc resolution is already there.
If you write the resolver yourself, it should work. I was thinking of function multiversioning (which I thought using ifunc behind the scenes) but I'm not sure what the aarch64 support level is (in gcc or clang). Anyway, I'm not aware of anyone using the MRS emulation (maybe they do and I haven't heard). I guess it doesn't help that we keep adding HWCAP bits ;). -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel