Re: [PATCH v6 1/5] dt-bindings: clock: meson: add A1 PLL clock controller bindings
From: Rob Herring <robh@kernel.org>
Date: 2020-01-16 20:48:22
Also in:
linux-amlogic, linux-clk, linux-devicetree, lkml
On Thu, Jan 16, 2020 at 04:04:36PM +0800, Jian Hu wrote:
quoted hunk ↗ jump to hunk
Add the documentation to support Amlogic A1 PLL clock driver, and add A1 PLL clock controller bindings. Signed-off-by: Jian Hu <redacted> --- .../bindings/clock/amlogic,a1-pll-clkc.yaml | 54 +++++++++++++++++++ include/dt-bindings/clock/a1-pll-clkc.h | 16 ++++++ 2 files changed, 70 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml create mode 100644 include/dt-bindings/clock/a1-pll-clkc.hdiff --git a/Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml new file mode 100644 index 000000000000..071240b65e70 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml@@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/amlogic,a1-pll-clkc.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Amlogic Meson A/C serials PLL Clock Control Unit Device Tree Bindings + +maintainers: + - Neil Armstrong <narmstrong@baylibre.com> + - Jerome Brunet <jbrunet@baylibre.com> + - Jian Hu <jian.hu@jian.hu.com> + +properties: + compatible: + const: amlogic,a1-pll-clkc + + "#clock-cells": + const: 1 + + reg: + maxItems: 1 + + clocks: + maxItems: 2
Not necessary, so drop. Implied by the length of 'items'.
+ items: + - description: input xtal_fixpll + - description: input xtal_hifipll + + clock-names: + maxItems: 2
Same here.
+ items:
+ - const: xtal_fixpll
+ - const: xtal_hifipll
+
+required:
+ - compatible
+ - "#clock-cells"
+ - reg
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ clkc_pll: pll-clock-controller@7c80 {
+ compatible = "amlogic,a1-pll-clkc";
+ reg = <0 0x7c80 0 0x18c>;
+ #clock-cells = <1>;
+ clocks = <&clkc_periphs CLKID_XTAL_FIXPLL>,
+ <&clkc_periphs CLKID_XTAL_HIFIPLL>;The example will fail to build because these aren't defined. Run 'make dt_binding_check'.
quoted hunk ↗ jump to hunk
+ clock-names = "xtal_fixpll", "xtal_hifipll"; + };diff --git a/include/dt-bindings/clock/a1-pll-clkc.h b/include/dt-bindings/clock/a1-pll-clkc.h new file mode 100644 index 000000000000..58eae237e503 --- /dev/null +++ b/include/dt-bindings/clock/a1-pll-clkc.h@@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +/* + * Copyright (c) 2019 Amlogic, Inc. All rights reserved. + */ + +#ifndef __A1_PLL_CLKC_H +#define __A1_PLL_CLKC_H + +#define CLKID_FIXED_PLL 1 +#define CLKID_FCLK_DIV2 6 +#define CLKID_FCLK_DIV3 7 +#define CLKID_FCLK_DIV5 8 +#define CLKID_FCLK_DIV7 9 +#define CLKID_HIFI_PLL 10 + +#endif /* __A1_PLL_CLKC_H */-- 2.24.0
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