[PATCH 2/3] i2c: at91: fix clk_offset for sama5d2
From: <hidden>
Date: 2019-12-02 08:56:46
Also in:
linux-devicetree, linux-i2c, lkml
Subsystem:
i2c subsystem, i2c subsystem host drivers, microchip i2c driver, the rest · Maintainers:
Andi Shyti, Codrin Ciubotariu, Linus Torvalds
From: Eugen Hristev <redacted>
In SAM9X60 datasheet, FLEX_TWI_CWGR register rescription mentions clock
offset of 3 cycles (compared to 4 in eg. SAMA5D3).
This is the same offset as in SAMA5D2.
Fixes: b00277923743 ("i2c: at91: add new platform support for sam9x60")
Suggested-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Signed-off-by: Eugen Hristev <redacted>
---
drivers/i2c/busses/i2c-at91-core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/i2c/busses/i2c-at91-core.c b/drivers/i2c/busses/i2c-at91-core.c
index e13af48..5137e62 100644
--- a/drivers/i2c/busses/i2c-at91-core.c
+++ b/drivers/i2c/busses/i2c-at91-core.c@@ -174,7 +174,7 @@ static struct at91_twi_pdata sama5d2_config = { static struct at91_twi_pdata sam9x60_config = { .clk_max_div = 7, - .clk_offset = 4, + .clk_offset = 3, .has_unre_flag = true, .has_alt_cmd = true, .has_hold_field = true,
--
2.7.4
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