Thread (18 messages) 18 messages, 3 authors, 2019-08-28

Re: [PATCH v3 0/5] arm64: avoid out-of-line ll/sc atomics

From: Andrew Murray <hidden>
Date: 2019-08-28 09:04:19

On Tue, Aug 27, 2019 at 05:49:45PM +0100, Will Deacon wrote:
Hi Andrew,

On Mon, Aug 12, 2019 at 03:36:20PM +0100, Andrew Murray wrote:
quoted
When building for LSE atomics (CONFIG_ARM64_LSE_ATOMICS), if the hardware
or toolchain doesn't support it the existing code will fallback to ll/sc
atomics. It achieves this by branching from inline assembly to a function
that is built with specical compile flags. Further this results in the
clobbering of registers even when the fallback isn't used increasing
register pressure.

Let's improve this by providing inline implementatins of both LSE and
ll/sc and use a static key to select between them. This allows for the
compiler to generate better atomics code.

Whilst it may be difficult to understand the performance impact, we gain
improved code readability, ability to use Clang, and improved backtrace
reliability.

Build and boot tested, along with atomic_64_test.
I think this series is really close now and I was hoping to get something
queued for 5.4. Would you be able to respin, addressing Mark's comments
please? It would be a shame for this to miss another release.
Sure, I'm working on this now.

Thanks,

Andrew Murray
Thanks,

Will
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