Thread (15 messages) 15 messages, 5 authors, 2019-08-27

Re: [PATCH 0/3] CP115 pinctrl support

From: Miquel Raynal <miquel.raynal@bootlin.com>
Date: 2019-08-24 11:33:17
Also in: linux-devicetree, linux-gpio

Hi Linus,

Linus Walleij [off-list ref] wrote on Thu, 15 Aug 2019
10:10:46 +0200:
On Wed, Aug 14, 2019 at 2:35 PM Thomas Petazzoni
[off-list ref] wrote:
quoted
On Wed, 14 Aug 2019 10:12:36 +0200
Linus Walleij [off-list ref] wrote:
 
quoted
On Wed, Aug 7, 2019 at 2:47 PM Linus Walleij [off-list ref] wrote:  
quoted
On Mon, Aug 5, 2019 at 12:16 PM Miquel Raynal [off-list ref] wrote:
 
quoted
This is the second batch of changes (out of three) to support the brand
new Marvell CN9130 SoCs which are made of one AP807 and one CP115.

We add a new compatible (and the relevant support in the pinctrl
driver) before the addition in batch 3/3 of CN9130 SoCs DT using it.  
Waiting for review from the Mvebu maintainers.

If it takes too long just nudge me, it looks good to me.  
So if the other MVEBU maintainers don't really look much at MVEBU
patches anymore while Miquel is working a lot on the platform,
what about listing Miquel as maintainer under the SoC entry, hm?  
Miquel sent his series on August 5, i.e 9 days ago. We're in August, in
the middle of the summer vacations for many people. While it is nice to
see subsystem maintainers who want to get code merged in a timely
fashion, I think it is probably wise to give it some more time for
review in this period of the year.  
OK then maybe I am a bit impatient.
Actually Gregory is on vacation until September, so if we still are in
time for this merge window I suppose you can take it.


Thanks,
Miquèl

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