On 28/08/2019 13:49, Robin Murphy wrote:

Hi Neil,

On 28/08/2019 12:28, Neil Armstrong wrote:

quoted

Hi Robin,

[...]

quoted

quoted

OK - with the 32-bit hack pointed to up-thread, a quick kmscube test gave me the impression that T720 works fine, but on closer inspection some parts of glmark2 do seem to go a bit wonky (although I suspect at least some of it is just down to the FPGA setup being both very slow and lacking in memory bandwidth), and the "nv12-1img" mode of kmscube turns out to render in some delightfully wrong colours.

I'll try to get a 'proper' version of the io-pgtable patch posted soon.

I'm trying to collect all the fixes needed to make T820 work again, and
I was wondering if you finally have a proper patch for this and "cfg->ias > 48"
hack ? Or one I can test ?

I do have a handful of io-pgtable patches written up and ready to go, I'm just treading carefully and waiting for the internal approval box to be ticked before I share anything :(

Great !

No problem, it can totally wait until approval,

Thanks,
Neil

Robin.

quoted

Thanks,
Neil

quoted

Thanks,
Robin.

quoted

Cheers,

Tomeu

quoted

Robin.


----->8-----

diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c
index 546968d8a349..f29da6e8dc08 100644
--- a/drivers/iommu/io-pgtable-arm.c
+++ b/drivers/iommu/io-pgtable-arm.c

@@ -1023,12 +1023,14 @@ arm_mali_lpae_alloc_pgtable(struct

io_pgtable_cfg *cfg, void *cookie)
          iop = arm_64_lpae_alloc_pgtable_s1(cfg, cookie);
          if (iop) {
                  u64 mair, ttbr;
+               struct arm_lpae_io_pgtable *data = io_pgtable_ops_to_data(&iop->ops);

+               data->levels = 4;
                  /* Copy values as union fields overlap */
                  mair = cfg->arm_lpae_s1_cfg.mair[0];
                  ttbr = cfg->arm_lpae_s1_cfg.ttbr[0];

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