[PATCH] clk: imx: lpcg: write twice when writing lpcg regs
From: Peng Fan <peng.fan@nxp.com>
Date: 2019-08-27 08:17:55
Also in:
linux-clk, lkml
Subsystem:
common clk framework, nxp i.mx clock drivers, the rest · Maintainers:
Michael Turquette, Stephen Boyd, Abel Vesa, Linus Torvalds
From: Peng Fan <peng.fan@nxp.com> There is hardware issue that: The output clock the LPCG cell will not turn back on as expected, even though a read of the IPG registers in the LPCG indicates that the clock should be enabled. The software workaround is to write twice to enable the LPCG clock output. Signed-off-by: Peng Fan <peng.fan@nxp.com> --- drivers/clk/imx/clk-lpcg-scu.c | 10 ++++++++++ 1 file changed, 10 insertions(+)
diff --git a/drivers/clk/imx/clk-lpcg-scu.c b/drivers/clk/imx/clk-lpcg-scu.c
index a73a799fb777..7391d0668ec4 100644
--- a/drivers/clk/imx/clk-lpcg-scu.c
+++ b/drivers/clk/imx/clk-lpcg-scu.c@@ -54,6 +54,11 @@ static int clk_lpcg_scu_enable(struct clk_hw *hw) reg |= val << clk->bit_idx; writel(reg, clk->reg); + /* + * There is hardware bug. When enabling the LPCG clock + * output, SW can write the enabling value twice + */ + writel(reg, clk->reg); spin_unlock_irqrestore(&imx_lpcg_scu_lock, flags);
@@ -71,6 +76,11 @@ static void clk_lpcg_scu_disable(struct clk_hw *hw) reg = readl_relaxed(clk->reg); reg &= ~(CLK_GATE_SCU_LPCG_MASK << clk->bit_idx); writel(reg, clk->reg); + /* + * There is hardware bug. When enabling the LPCG clock + * output, SW can write the enabling value twice + */ + writel(reg, clk->reg); spin_unlock_irqrestore(&imx_lpcg_scu_lock, flags); }
--
2.16.4
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