Thread (3 messages) 3 messages, 3 authors, 2019-08-03
STALE2530d

[PATCH] arm64: dts: imx8mm: Fix boot hang at clk init

From: Leonard Crestez <hidden>
Date: 2019-07-25 09:50:58
Also in: linux-clk
Subsystem: arm/freescale imx / mxc arm architecture, the rest · Maintainers: Frank Li, Sascha Hauer, Linus Torvalds

The assigned-clock-rates property is incorrect (4 elements while
assigned-clocks has length 5) and boot hangs while assigning some
unexpected rates.

Fix by inserting another <400000000>, the intention is to assign both
IMX8MM_CLK_AUDIO_AHB and IMX8MM_CLK_IPG_AUDIO_ROOT 400mhz.

Fixes: df1703896a17 ("arm64: dts: imx8mm: Init rates and parents configs for clocks")

Signed-off-by: Leonard Crestez <redacted>

---
Changes since v1:
* Insert and 400mhz instead of <0>
Link to v1: https://patchwork.kernel.org/patch/11057515/

Should probably be squashed into df1703896a17

 arch/arm64/boot/dts/freescale/imx8mm.dtsi | 1 +
 1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index c9a7c0054c5c..7bbdcebc6b57 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -461,10 +461,11 @@
 						<&clk IMX8MM_SYS_PLL3>,
 						<&clk IMX8MM_VIDEO_PLL1>;
 				assigned-clock-parents = <&clk IMX8MM_SYS_PLL3_OUT>,
 							 <&clk IMX8MM_SYS_PLL1_800M>;
 				assigned-clock-rates = <0>,
+							<400000000>,
 							<400000000>,
 							<750000000>,
 							<594000000>;
 			};
 
-- 
2.17.1


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