[PATCH] pwm: meson: fix the G12A AO clock parents order
From: Neil Armstrong <hidden>
Date: 2019-06-20 14:47:03
Also in:
linux-amlogic, linux-pwm, lkml
Subsystem:
pwm subsystem, the rest · Maintainers:
Uwe Kleine-König, Linus Torvalds
The Amlogic G12A and G12B Documentation is wrong, the AO xtal and clk81 clock source order is reversed, and validated when adding DVFS support by using the PWM AO D output to control the CPU supply voltage. The vendor tree also uses the reversed xtal and clk81 order at [1]. [1] https://github.com/hardkernel/linux/blob/odroidn2-4.9.y/drivers/amlogic/pwm/pwm_meson.c#L462 Fixes: f41efceb46e6 ("pwm: meson: Add clock source configuration for Meson G12A") Signed-off-by: Neil Armstrong <redacted> --- drivers/pwm/pwm-meson.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c
index 5e65b042c240..e15d045947bb 100644
--- a/drivers/pwm/pwm-meson.c
+++ b/drivers/pwm/pwm-meson.c@@ -453,8 +453,17 @@ static const struct meson_pwm_data pwm_axg_ao_data = { .num_parents = ARRAY_SIZE(pwm_axg_ao_parent_names), }; +static const char * const pwm_g12a_ao_ab_parent_names[] = { + "xtal", "aoclk81", "fclk_div4", "fclk_div5" +}; + +static const struct meson_pwm_data pwm_g12a_ao_ab_data = { + .parent_names = pwm_g12a_ao_ab_parent_names, + .num_parents = ARRAY_SIZE(pwm_g12a_ao_ab_parent_names), +}; + static const char * const pwm_g12a_ao_cd_parent_names[] = { - "aoclk81", "xtal", + "xtal", "aoclk81", }; static const struct meson_pwm_data pwm_g12a_ao_cd_data = {
@@ -498,7 +507,7 @@ static const struct of_device_id meson_pwm_matches[] = { }, { .compatible = "amlogic,meson-g12a-ao-pwm-ab", - .data = &pwm_axg_ao_data + .data = &pwm_g12a_ao_ab_data }, { .compatible = "amlogic,meson-g12a-ao-pwm-cd",
--
2.21.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel