On 22/03/2019 10:29, Mike Rapoport wrote:

On Fri, Mar 22, 2019 at 10:11:59AM +0000, Steven Price wrote:

quoted

On 21/03/2019 21:15, Mike Rapoport wrote:

quoted

On Thu, Mar 21, 2019 at 02:19:44PM +0000, Steven Price wrote:

quoted

pgd_entry() and pud_entry() were removed by commit 0b1fbfe50006c410
("mm/pagewalk: remove pgd_entry() and pud_entry()") because there were
no users. We're about to add users so reintroduce them, along with
p4d_entry() as we now have 5 levels of tables.

Note that commit a00cc7d9dd93d66a ("mm, x86: add support for
PUD-sized transparent hugepages") already re-added pud_entry() but with
different semantics to the other callbacks. Since there have never
been upstream users of this, revert the semantics back to match the
other callbacks. This means pud_entry() is called for all entries, not
just transparent huge pages.

Signed-off-by: Steven Price <steven.price@arm.com>
---
 include/linux/mm.h |  9 ++++++---
 mm/pagewalk.c      | 27 ++++++++++++++++-----------
 2 files changed, 22 insertions(+), 14 deletions(-)

diff --git a/include/linux/mm.h b/include/linux/mm.h
index 76769749b5a5..2983f2396a72 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h

@@ -1367,10 +1367,9 @@ void unmap_vmas(struct mmu_gather *tlb, struct vm_area_struct *start_vma,

 /**
  * mm_walk - callbacks for walk_page_range
+ * @pgd_entry: if set, called for each non-empty PGD (top-level) entry
+ * @p4d_entry: if set, called for each non-empty P4D (1st-level) entry

IMHO, p4d implies the 4th level :)

You have a good point there... I was simply working back from the
existing definitions (below) of PTE:4th, PMD:3rd, PUD:2nd. But it's
already somewhat broken by PGD:0th and my cop-out was calling it "top".

quoted

I think it would make more sense to start counting from PTE rather than
from PGD. Then it would be consistent across architectures with fewer
levels.

It would also be the opposite way round to architectures such as Arm
which number their levels, for example [1] refers to levels 0-3 (with 3
being PTE in Linux terms).

By consistent I meant that for architectures with fewer levels we won't be
describing PTE as level 4 when the architecture only has 2 levels.

Ah I see, although we've apparently been doing that for over a decade
already[2] :)

[2]
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e6473092bd9116583ce9ab8cf1b6570e1aa6fc83

quoted

[1]
https://developer.arm.com/docs/100940/latest/translation-tables-in-armv8-a

Probably the least confusing thing is to drop the level numbers in
brackets since I don't believe they directly match any architecture, and
hopefully any user of the page walking code is already familiar with the
P?D terms used by the kernel.

That's a fair assumption :)
Still, maybe we keep your (top-level) for PGD and use (lowest level) for
PTE and drop those in the middle?

Yes that's a good compromise.

Thanks,

Steve

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