Re: [PATCH 3/3] imx8mq.dtsi: add the sdma nodes
From: Daniel Baluta <hidden>
Date: 2019-02-22 19:44:58
Also in:
dmaengine, lkml
Hi Angus, What is the status of this patch? Most likely this should go through Shwan's tree. I noticed that I have also sent a similar patch to Shawn: https://www.spinics.net/lists/arm-kernel/msg708424.html So, lets coordinate and work better on this. I am now preparing another series where I add SAI nodes and enable WM codec on imx8MQ. If you don't mind I will pick your relevant changes from this patch and add them to my series, then send them to Shawn. thanks, Daniel. On Sun, Jan 20, 2019 at 4:05 AM Angus Ainslie (Purism) [off-list ref] wrote:
quoted hunk ↗ jump to hunk
Add the sdma nodes to the base devicetree for the imx8mq Signed-off-by: Angus Ainslie (Purism) <redacted> --- arch/arm64/boot/dts/freescale/imx8mq.dtsi | 31 +++++++++++++++++++++++ 1 file changed, 31 insertions(+)diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index c0402375e7c1..0b9a9b5ae7b7 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi@@ -336,6 +336,19 @@ clocks = <&clk IMX8MQ_CLK_WDOG3_ROOT>; status = "disabled"; }; + + sdma2: sdma@302c0000 { + compatible = "fsl,imx8mq-sdma", "fsl,imx7d-sdma"; + reg = <0x302c0000 0x10000>; + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MQ_CLK_SDMA2_ROOT>, + <&clk IMX8MQ_CLK_SDMA2_ROOT>; + clock-names = "ipg", "ahb"; + #dma-cells = <3>; + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin"; + fsl,ratio-1-1; + status = "disabled"; + }; }; bus@30400000 { /* AIPS2 */@@ -370,6 +383,8 @@ clocks = <&clk IMX8MQ_CLK_UART3_ROOT>, <&clk IMX8MQ_CLK_UART3_ROOT>; clock-names = "ipg", "per"; + dmas = <&sdma1 26 4 0>, <&sdma1 27 4 0>; + dma-names = "rx", "tx"; status = "disabled"; };@@ -381,6 +396,8 @@ clocks = <&clk IMX8MQ_CLK_UART2_ROOT>, <&clk IMX8MQ_CLK_UART2_ROOT>; clock-names = "ipg", "per"; + dmas = <&sdma1 24 4 0>, <&sdma1 25 4 0>; + dma-names = "rx", "tx"; status = "disabled"; };@@ -432,6 +449,8 @@ clocks = <&clk IMX8MQ_CLK_UART4_ROOT>, <&clk IMX8MQ_CLK_UART4_ROOT>; clock-names = "ipg", "per"; + dmas = <&sdma1 28 4 0>, <&sdma1 29 4 0>; + dma-names = "rx", "tx"; status = "disabled"; };@@ -465,6 +484,18 @@ status = "disabled"; }; + sdma1: sdma@30bd0000 { + compatible = "fsl,imx8mq-sdma", "fsl,imx7d-sdma"; + reg = <0x30bd0000 0x10000>; + interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MQ_CLK_SDMA1_ROOT>, + <&clk IMX8MQ_CLK_SDMA1_ROOT>; + clock-names = "ipg", "ahb"; + #dma-cells = <3>; + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin"; + status = "disabled"; + }; + fec1: ethernet@30be0000 { compatible = "fsl,imx8mq-fec", "fsl,imx6sx-fec"; reg = <0x30be0000 0x10000>; --2.17.1
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