Re: [PATCH] pinctrl: sunxi: Correct number of IRQ banks on H6 main pin controller
From: Linus Walleij <hidden>
Date: 2019-01-21 13:41:47
Also in:
linux-gpio, lkml, stable
From: Linus Walleij <hidden>
Date: 2019-01-21 13:41:47
Also in:
linux-gpio, lkml, stable
On Tue, Jan 15, 2019 at 3:45 AM Chen-Yu Tsai [off-list ref] wrote:
The H6 main pin controller has four banks of interrupt-triggering pins.
The driver as originally submitted only specified three, but had pin
descriptions referencing a fourth bank. This results in a out-of-bounds
access into .irq_array of struct sunxi_pinctrl. This however did not
result in a crash until v4.20, with commit a66d972465d1 ("devres: Align
data[] to ARCH_KMALLOC_MINALIGN"), which changed the alignment of memory
region returned by devm_kcalloc(). The increase likely moved the
out-of-bounds access into the next, unmapped page.Nice work rootcausing this! Patch applied for fixes with the tested-by and ACK. Yours, Linus Walleij _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel