Thread (7 messages) 7 messages, 1 author, 2019-01-20
STALE2734d
Revisions (4)
  1. v3 current
  2. v3 [diff vs current]
  3. v4 [diff vs current]
  4. v5 [diff vs current]

[PATCH v3 6/6] dt-bindings: fpga: Add bindings for ZynqMP fpga driver

From: Nava kishore Manne <hidden>
Date: 2019-01-20 17:26:18
Also in: linux-devicetree, lkml
Subsystem: fpga manager framework, open firmware and flattened device tree bindings, the rest · Maintainers: Moritz Fischer, Xu Yilun, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds

Add documentation to describe Xilinx ZynqMP fpga driver
bindings.

Signed-off-by: Nava kishore Manne <redacted>
---
Changes for v3:
		-Removed PCAP as a child node to the FW and Created
		an independent node since PCAP driver is a consumer
		not a provider. 

 .../bindings/fpga/xlnx,zynqmp-pcap-fpga.txt         | 13 +++++++++++++
 1 file changed, 13 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.txt
diff --git a/Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.txt b/Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.txt
new file mode 100644
index 000000000000..1f6f58872311
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.txt
@@ -0,0 +1,13 @@
+Device Tree zynqmp-fpga bindings for the Zynq Ultrascale+ MPSoC controlled
+using ZynqMP SoC firmware interface
+For Bitstream configuration on ZynqMp Soc uses processor configuration
+port(PCAP) to configure the programmable logic(PL) through PS by using
+FW interface.
+
+Required properties:
+- compatible: should contain "xlnx,zynqmp-pcap-fpga"
+
+Example:
+	zynqmp_pcap: pcap {
+		compatible = "xlnx,zynqmp-pcap-fpga";
+	};
-- 
2.18.0


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