On Mon, Jan 7, 2019 at 6:59 PM Maxime Ripard [off-list ref] wrote:

On Mon, Dec 24, 2018 at 08:57:48PM +0530, Jagan Teki wrote:

quoted

On Fri, Dec 21, 2018 at 6:30 PM Maxime Ripard [off-list ref] wrote:

quoted

On Thu, Dec 20, 2018 at 06:24:34PM +0530, Jagan Teki wrote:

quoted

Unfortunately default CSI_SCLK rate cannot work properly to
drive the connected sensor interface, particularly on few
Allwinner SoC's like A64.

So, add mod_rate quirk via driver data so-that the respective
SoC's which require to alter the default mod clock rate can assign
the operating clock rate.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
 .../platform/sunxi/sun6i-csi/sun6i_csi.c      | 34 +++++++++++++++----
 1 file changed, 28 insertions(+), 6 deletions(-)

diff --git a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c
index ee882b66a5ea..fe002beae09c 100644
--- a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c
+++ b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c

@@ -15,6 +15,7 @@
 #include <linux/ioctl.h>
 #include <linux/module.h>
 #include <linux/of.h>
+#include <linux/of_device.h>
 #include <linux/platform_device.h>
 #include <linux/pm_runtime.h>
 #include <linux/regmap.h>

@@ -28,8 +29,13 @@

 #define MODULE_NAME  "sun6i-csi"

+struct sun6i_csi_variant {
+     unsigned long                   mod_rate;
+};
+
 struct sun6i_csi_dev {
      struct sun6i_csi                csi;
+     const struct sun6i_csi_variant  *variant;
      struct device                   *dev;

      struct regmap                   *regmap;

@@ -822,33 +828,43 @@ static int sun6i_csi_resource_request(struct sun6i_csi_dev *sdev,
              return PTR_ERR(sdev->clk_mod);
      }

+     if (sdev->variant->mod_rate)
+             clk_set_rate_exclusive(sdev->clk_mod, sdev->variant->mod_rate);
+

It still doesn't make any sense to do it in the probe function...

I'm not sure we discussed about the context wrt probe, we discussed
about exclusive put clock.

https://lkml.org/lkml/2018/12/18/584

"Doing it here is not really optimal either, since you'll put a
constraint on the system (maintaining that clock at 300MHz), while
it's not in use."

quoted

Since clocks were enabling in set_power and clock rate can be set
during probe in single time instead of setting it in set_power for
every power enablement. anything wrong with that.

See above.

Plus, a clock running draws power. It doesn't really make sense to
draw power for something that is unused.

True, but clock is enabled only on sun6i_csi_set_power so setting
clock frequency in probe will draw power?

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