Re: [PATCH 2/2] arm64: dts: clearfog-gt-8k: 1G eth PHY reset signal
From: Gregory CLEMENT <gregory.clement@bootlin.com>
Date: 2018-11-30 17:45:51
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netdev
Hi Baruch, On mar., oct. 16 2018, Baruch Siach [off-list ref] wrote:
This reset signal controls the Marvell 1512 1G PHY. Note that current implementation queries the PHY over the MDIO bus (get_phy_device() call from of_mdiobus_register_phy()) before reset signal deassert. If the PHY reset signal is asserted at boot time, PHY registration fails. So current code relies on the bootloader to deassert the reset signal.
Applied on mvebu/dt64 Thanks, Gregory
quoted hunk
Signed-off-by: Baruch Siach <baruch@tkos.co.il> --- arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts | 4 ++++ 1 file changed, 4 insertions(+)diff --git a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts index af1310c53bc8..73df0ef5e0c4 100644 --- a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts +++ b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts@@ -337,6 +337,10 @@ */ marvell,reg-init = <3 16 0 0x1017>; reg = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&cp0_copper_eth_phy_reset>; + reset-gpios = <&cp1_gpio1 11 GPIO_ACTIVE_LOW>; + reset-assert-us = <10000>; }; switch0: switch0@4 {-- 2.19.1
-- Gregory Clement, Bootlin Embedded Linux and Kernel engineering http://bootlin.com _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel