On Tue, Oct 2, 2018 at 3:28 PM Ard Biesheuvel [off-list ref] wrote:
On 2 October 2018 at 15:20, Jason A. Donenfeld [off-list ref] wrote:
quoted
The purpose of CONFIG_CPU_32v3 is to avoid ldrh/strh on the RiscPC,
which is pretty much an ARMv4 device, except its bus will choke on the
half-words. The way to make the C compiler not output ldrh/strh is with
-march=armv3, which doesn't support them in the ISA. However, this
prevents certain cryptography code from working that uses instructions
like umull. Fortunately there's also -march=armv3m that does support
those, making it possible to continue assembling optimized cryptography
routines for our beloved RiscPC.
Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
Cc: Ard Biesheuvel <redacted>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Arnd Bergmann <arnd@arndb.de>
Acked-by: Ard Biesheuvel <redacted>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Please add this to Russell's patch tracker for inclusion at
http://www.arm.linux.org.uk/developer/patches/
Arnd