[PATCH 4/7] arm64: compat: Add cp15_32 and cp15_64 handler arrays
From: Marc Zyngier <hidden>
Date: 2018-09-27 16:15:31
Subsystem:
arm64 port (aarch64 architecture), the rest · Maintainers:
Catalin Marinas, Will Deacon, Linus Torvalds
We're now ready to start handling CP15 access. Let's add (empty) arrays for both 32 and 64bit accessors, and the code that deals with them. Reviewed-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Marc Zyngier <redacted> --- arch/arm64/kernel/traps.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+)
diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c
index db036a097672..2920a8f30158 100644
--- a/arch/arm64/kernel/traps.c
+++ b/arch/arm64/kernel/traps.c@@ -607,8 +607,18 @@ static void arm64_compat_skip_faulting_instruction(struct pt_regs *regs, arm64_skip_faulting_instruction(regs, sz); } +static struct sys64_hook cp15_32_hooks[] = { + {}, +}; + +static struct sys64_hook cp15_64_hooks[] = { + {}, +}; + asmlinkage void __exception do_cp15instr(unsigned int esr, struct pt_regs *regs) { + struct sys64_hook *hook, *hook_base; + if (!cp15_cond_valid(esr, regs)) { /* * There is no T16 variant of a CP access, so we
@@ -618,6 +628,24 @@ asmlinkage void __exception do_cp15instr(unsigned int esr, struct pt_regs *regs) return; } + switch (ESR_ELx_EC(esr)) { + case ESR_ELx_EC_CP15_32: + hook_base = cp15_32_hooks; + break; + case ESR_ELx_EC_CP15_64: + hook_base = cp15_64_hooks; + break; + default: + do_undefinstr(regs); + return; + } + + for (hook = hook_base; hook->handler; hook++) + if ((hook->esr_mask & esr) == hook->esr_val) { + hook->handler(esr, regs); + return; + } + /* * New cp15 instructions may previously have been undefined at * EL0. Fall back to our usual undefined instruction handler
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2.19.0