Hi Sudeep,

On 09/26/2018 05:48 PM, Sudeep Holla wrote:

On Wed, Sep 26, 2018 at 05:42:15PM +0300, Georgi Djakov wrote:

quoted

Hi Rob,

Thanks for the comments!

On 09/25/2018 09:02 PM, Rob Herring wrote:

quoted

On Fri, Aug 31, 2018 at 05:01:45PM +0300, Georgi Djakov wrote:

quoted

This binding is intended to represent the relations between the interconnect
controllers (providers) and consumer device nodes. It will allow creating links
between consumers and interconnect paths (exposed by interconnect providers).

As I mentioned in person, I want to see other SoC families using this 
before accepting. They don't have to be ready for upstream, but WIP 
patches or even just a "yes, this works for us and we're going to use 
this binding on X".

Other than the 3 Qualcomm SoCs (msm8916, msm8996, sdm845) that are
currently using this binding, there is ongoing work from at least two
other vendors that would be using this same binding. I will check on
what is their progress so far.

quoted

Also, I think the QCom GPU use of this should be fully sorted out. Or 
more generically how this fits into OPP binding which seems to be never 
ending extended...

I see this as a further step. It could be OPP binding which include
bandwidth values or some separate DT property. Jordan has already
proposed something, do you have any initial comments on that?

I am curious as how this fits into new systems which have firmware driven
CPUFreq and other DVFS. I would like to avoid using this in such systems
and leave it upto the firmware to scale the bus/interconnect based on the
other components that are connected to it and active.

This can be used with firmware driven systems too. In this case the
interconnect platform driver will not manage the interconnects directly,
but will collect data and provide hints to the firmware. Then the
firmware can take into account these hints and do the scaling.

Thanks,
Georgi