[PATCH] clk: sunxi-ng: h6: fix PWM gate/reset offset
From: Chen-Yu Tsai <hidden>
Date: 2018-08-10 16:48:44
Also in:
linux-clk, lkml
From: Chen-Yu Tsai <hidden>
Date: 2018-08-10 16:48:44
Also in:
linux-clk, lkml
On Fri, Aug 10, 2018 at 11:16 PM, Icenowy Zheng [off-list ref] wrote:
From: Rongyi Chen <redacted>
Currently the register offset of the PWM bus gate in Allwinner H6 clock
driver is wrong.
Fix this issue.
Fixes: 542353ea ("clk: sunxi-ng: add support for the Allwinner H6 CCU")
Signed-off-by: Rongyi Chen <redacted>
[Icenowy: refactor commit message]
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>Queued up for 4.20. Thanks ChenYu