[RFC PATCH v2 1/4] dt-bindings: misc: Add bindings for misc. BMC control fields
From: Kun Yi <hidden>
Date: 2018-08-10 00:23:12
Also in:
linux-devicetree, lkml, openbmc
Andrew, Benjamin, Rob, Thanks for bringing up the set of patches and a great discussion. After going through the thread I figured that I'd like to share a few things we needed to hack when programming several BMC boards: - Debug UART enable/mux - Disable GPIO D/E passthrough (I think this is supported by the current pinctrl driver) - RMII/RGMII strapping - iLPC2AHB control - SPI master mux select - Various SuperIO configurations As for the discussion whether these belong to a platform driver or device tree nodes, I think in an ideal world all these configurations could be nicely grouped and abstracted in a platform kernel driver (or drivers). However in reality think this as an "M * N" problem: there are M variants of BMCs and N different platforms built with these BMCs. Each platform-BMC combination is going to have its own quirks and slightly different requirements in BMC "tunables". Were there a kernel driver for the M BMC variants, it would inevitably have a lot of churn due to the different needs of the platforms. What I like about the device tree approach is the expressiveness of the format and the ability to specify non-conflicting initial values easily. Sometimes we need initial values for these parameters set before running userspace, and setting such values in device tree is easier than using #defines or kernel parameters. On Thu, Jul 19, 2018 at 9:57 PM Benjamin Herrenschmidt [off-list ref] wrote:
On Fri, 2018-07-20 at 09:37 +0930, Andrew Jeffery wrote:quoted
quoted
Andrew, can you start with a list that shows what you expect us to need on our systems ?Okay, our Witherspoon and Romulus platforms containing the ASPEED AST2500 currently need the following tuneables exposed:quoted
From the SCU:- Debug UART enable - VGA DAC mux - VGA scratch registers 0-7 - LPC SuperIO decode enable - VGA MMIO decode enablequoted
From the LPC controller:- iLPC2AHB enable - SuperIO scratch registers 0x20-0x2f (The LPC controller is just as much of a collection of random bits as the SCU) Lastly, our Palmetto platform uses an AST2400 which has fewer features compared to the AST2500. Its tuneable list is the same as the above with the exception of "Debug UART enable". Tuneables that we may need to expose in the future include:quoted
From the SCU:- PCI VID/DID for the BMC PCIe device - VGA device enable (may need to be disabled if the platform contains a discrete graphics processor)Additionally there's a bunch of resigters controlling the mapping of various MMIO regions of the BMC PCIe device to portions of the BMC address space. I'm not sure what's the best way to handle that. This specific set might require a dedicated device as a subnode of the SCU in the DT that contains all the mappings as properties... That or we consider them static enough and just whack it in u-boot.quoted
quoted
From the LPC controller:- UART mux Alexander, Eugene, can you chime in with your platforms' needs? Cheers, Andrew
-- Regards, Kun