[PATCH v4 03/10] arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile
From: Marc Zyngier <hidden>
Date: 2018-07-31 06:21:34
Also in:
linux-clk, linux-devicetree, linux-mediatek, linux-serial, lkml
On Tue, 31 Jul 2018 06:38:00 +0100, Erin Lo [off-list ref] wrote:
quoted hunk ↗ jump to hunk
From: Ben Ho <redacted> Add basic chip support for Mediatek 8183 Signed-off-by: Ben Ho <redacted> Signed-off-by: Erin Lo <redacted> --- arch/arm64/boot/dts/mediatek/Makefile | 1 + arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 23 +++++ arch/arm64/boot/dts/mediatek/mt8183.dtsi | 146 ++++++++++++++++++++++++++++ 3 files changed, 170 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsidiff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile index 7506b0d..a91d462 100644 --- a/arch/arm64/boot/dts/mediatek/Makefile +++ b/arch/arm64/boot/dts/mediatek/Makefile@@ -6,3 +6,4 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-evb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-evb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtbdiff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts new file mode 100644 index 0000000..2a3dd5a --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts@@ -0,0 +1,23 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (c) 2018 MediaTek Inc. + * Author: Ben Ho <ben.ho@mediatek.com> + * Erin Lo <erin.lo@mediatek.com> + */ + +/dts-v1/; +#include "mt8183.dtsi" + +/ { + model = "MediaTek MT8183 evaluation board"; + compatible = "mediatek,mt8183-evb", "mediatek,mt8183"; + + memory at 40000000 { + device_type = "memory"; + reg = <0 0x40000000 0 0x80000000>; + }; + + chosen { + stdout-path = "serial0:921600n8"; + }; +};diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi new file mode 100644 index 0000000..1553265 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi@@ -0,0 +1,146 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (c) 2018 MediaTek Inc. + * Author: Ben Ho <ben.ho@mediatek.com> + * Erin Lo <erin.lo@mediatek.com> + */ + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + compatible = "mediatek,mt8183"; + interrupt-parent = <&sysirq>; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + core2 { + cpu = <&cpu2>; + }; + core3 { + cpu = <&cpu3>; + }; + }; + + cluster1 { + core0 { + cpu = <&cpu4>; + }; + core1 { + cpu = <&cpu5>; + }; + core2 { + cpu = <&cpu6>; + }; + core3 { + cpu = <&cpu7>; + }; + }; + }; + + cpu0: cpu at 000 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x000>; + enable-method = "psci"; + }; + + cpu1: cpu at 001 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x001>; + enable-method = "psci"; + }; + + cpu2: cpu at 002 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x002>; + enable-method = "psci"; + }; + + cpu3: cpu at 003 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x003>; + enable-method = "psci"; + }; + + cpu4: cpu at 100 { + device_type = "cpu"; + compatible = "arm,cortex-a73"; + reg = <0x100>; + enable-method = "psci"; + }; + + cpu5: cpu at 101 { + device_type = "cpu"; + compatible = "arm,cortex-a73"; + reg = <0x101>; + enable-method = "psci"; + }; + + cpu6: cpu at 102 { + device_type = "cpu"; + compatible = "arm,cortex-a73"; + reg = <0x102>; + enable-method = "psci"; + }; + + cpu7: cpu at 103 { + device_type = "cpu"; + compatible = "arm,cortex-a73"; + reg = <0x103>; + enable-method = "psci"; + }; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupt-parent = <&gic>; + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + }; + + gic: interrupt-controller at 0c000000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + interrupt-parent = <&gic>; + interrupt-controller; + reg = <0 0x0c000000 0 0x40000>, /* GICD */ + <0 0x0c100000 0 0x200000>, /* GICR */ + <0 0x0c400000 0 0x2000>, /* GICC */ + <0 0x0c410000 0 0x1000>, /* GICH */ + <0 0x0c420000 0 0x2000>; /* GICV */ + + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; + }; + + sysirq: intpol-controller at 0c530a80 { + compatible = "mediatek,mt8183-sysirq", + "mediatek,mt6577-sysirq"; + interrupt-controller; + #interrupt-cells = <3>; + interrupt-parent = <&gic>; + reg = <0 0x0c530a80 0 0x50>; + }; +};
Not directly related to that patch, but still worth asking, if this HW is going to get some mainline support: I do not see any mention on the PMU yet. It'd be good to see it added early, specially if we need to express CPU affinity (as this change the size of the GICv3 interrupt specifier, see the rk3399 support for an example). Thanks, M. -- Jazz is not dead, it just smell funny.