Thread (29 messages) 29 messages, 10 authors, 2018-06-28

[PATCH 0/5] RFC: Mezzanine handling for 96boards

From: Michal Simek <hidden>
Date: 2018-06-22 13:36:16
Also in: linux-devicetree

On 18.6.2018 16:15, Arnd Bergmann wrote:
On Mon, Jun 18, 2018 at 3:22 PM, Ard Biesheuvel
[off-list ref] wrote:
quoted
On 18 June 2018 at 14:21, Arnd Bergmann [off-list ref] wrote:
quoted
On Mon, Jun 18, 2018 at 9:45 AM, Linus Walleij [off-list ref] wrote:
Also, given that we can (and do) already describe topologies involving
mezzanines by ignoring the connector altogether (which is not entirely
unreasonable given the fact that we [as Linaro/96boards] dropped the
ball on this one and did not mandate discoverability for mezzanines).
So ideally, DTs can be expressed such that older kernels can still use
those peripherals.
Not sure. Modeling the connector as a device with its own driver does
seem like a significant advantage, which to me weighs more than backward
compatibility with old kernels. We can clearly always describe the devices
behind the connector individually and ignore the connector on old kernels
and we should still allow running DT files that work with the old kernels
on new kernels, but I don't see running new DT files on old kernels as
essential in this case. Many platforms don't actually care about that case
at all today (but some do of course).
Linus choose Ultra96 board which is showing that "standard" 96boards
connector doesn't need to be standard in all cases.
If you look at board schematics that you will see that loaded
bitstream/configuration is making these connector compatible with
96boards spec.
Almost the whole HS connector is connected to programmable logic and low
speed connector is pretty much flexible too.

Also resource/power saving case should be considered.
I will take uart mezzanine as an example which requires only 6 uart pins
and one gpio. In Ultra96 that means that doesn't make sense to waste
your fpga resources for something what you don't need.
(Truth is that for low speed it is just about wires but with High speed
connector MIPI is in PL part which consume a logic).
And both connectors should also be handled together because some
mezzanine cards require both of them.

Thanks,
Michal
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