Thread (6 messages) 6 messages, 2 authors, 2018-06-21
STALE2919d

[PATCH v2 2/5] dt-bindings: xilinx_dma: add optional xlnx, sg-length-width property

From: Andrea Merello <hidden>
Date: 2018-06-21 11:59:17
Also in: dmaengine, lkml
Subsystem: dma generic offload engine subsystem, open firmware and flattened device tree bindings, the rest · Maintainers: Vinod Koul, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds

The width of the "length register" cannot be autodetected, and it is now
specified with a DT property. Add DOC for it.

Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Andrea Merello <redacted>
---
Changes in v2:
	- change property name
	- property is now optional
	- cc DT maintainer
---
 Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt | 1 +
 1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
index a2b8bfaec43c..c894abe28baa 100644
--- a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
+++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
@@ -41,6 +41,7 @@ Optional properties:
 - xlnx,include-sg: Tells configured for Scatter-mode in
 	the hardware.
 Optional properties for AXI DMA:
+- xlnx,sg-length-width: Should be the width of the length register as configured in h/w.
 - xlnx,mcdma: Tells whether configured for multi-channel mode in the hardware.
 Optional properties for VDMA:
 - xlnx,flush-fsync: Tells which channel to Flush on Frame sync.
-- 
2.17.1
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