arch_wb_cache_pmem on ARM64

Hi

I'd like to ask what's the purpose of dmb(osh) in the function 
arch_wb_cache_pmem in arch/arm64/mm/flush.c?

void arch_wb_cache_pmem(void *addr, size_t size)
{
        /* Ensure order against any prior non-cacheable writes */
        dmb(osh);
        __clean_dcache_area_pop(addr, size);
}

The processor may flush the cache spontaneously, that means that all the 
flushing may actually happen before the dmb(osh) instruction - so what 
does that dmb instruction guard against?

Mikulas