[PATCH v4 02/26] arm64: cpufeature: Add cpufeature for IRQ priority masking
From: Julien Thierry <hidden>
Date: 2018-05-25 10:48:17
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On 25/05/18 11:41, Suzuki K Poulose wrote:
On 25/05/18 11:39, Julien Thierry wrote:quoted
On 25/05/18 11:36, Suzuki K Poulose wrote:quoted
On 25/05/18 11:17, Julien Thierry wrote:quoted
On 25/05/18 11:04, Suzuki K Poulose wrote:quoted
On 25/05/18 10:49, Julien Thierry wrote:quoted
Add a cpufeature indicating whether a cpu supports masking interrupts by priority.How is this different from the SYSREG_GIC_CPUIF cap ? Is it just the description ?More or less. It is just to have an easier condition in the rest of the series. Basically the PRIO masking feature is enabled if we have a GICv3 CPUIF working *and* the option was selected at build time. Before this meant that I was checking for the GIC_CPUIF cap inside #ifdefs (and putting alternatives depending on that inside #ifdefs as well). Having this as a separate feature feels easier to manage in the code. It also makes it clearer at boot time that the kernel will be using irq priorities (although I admit it was not the initial intention): [??? 0.000000] CPU features: detected: IRQ priority masking But yes that new feature will be detected only if SYSREG_GIC_CPUIF gets detected as well.Well, you could always wrap the check like : static inline bool system_has_irq_priority_masking(void) { ?????return (IS_ENABLED(CONFIG_YOUR_CONFIG) && cpus_have_const_cap(HWCAP_SYSREG_GIC_CPUIF)); } and use it everywhere.Yes, but I can't use that in the asm parts that use alternatives and would need to surround them in #ifdef... :\I thought there is _ALTERNATIVE_CFG() to base the alternative depend on a CONFIG_xxx ? Doesn't that solve the problem ?
Right, I didn't see that one. It should work yes. I'll try that when working on the next version. Thanks, -- Julien Thierry