Thread (19 messages) read the whole thread 19 messages, 4 authors, 2018-03-27

[PATCH v7 0/7] netdev: intel: Eliminate duplicate barriers on weakly-ordered archs

From: LinoSanfilippo@gmx.de (Lino Sanfilippo)
Date: 2018-03-27 14:04:20
Also in: intel-wired-lan, linux-arm-msm, netdev

Hi,
Double sorry now.

I don't know if you have been following "RFC on writel and writel_relaxed" thread
or not but there are some new developments about wmb() requirement. 
Just out of interest: Where can this thread be found?
Basically, wmb() should never be used before writel() as writel() seem to
provide coherency and observability guarantee.
AFAIU memory-barriers.txt writel() only guarantees correct order of accesses to
IO-memory not RAM vs. IO-memory (this may be the case for some architectures 
where the writel() implementation contains a wmb() but not for all).
For the RAM vs. IO-memory case at least a a wmb()/rmb() has to be used. 
Is this not correct? 

Regards,
Lino
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