[PATCH 03/37] iommu/sva: Manage process address spaces

Am 01.03.2018 um 07:52 schrieb Lu Baolu:

Hi Jean,

On 02/13/2018 02:33 AM, Jean-Philippe Brucker wrote:

quoted

[SNIP]
+	pasid = idr_alloc_cyclic(&iommu_pasid_idr, io_mm, dev_param->min_pasid,
+				 dev_param->max_pasid + 1, GFP_ATOMIC);

Can the pasid management code be moved into a common library?
PASID is not stick to SVA. An IOMMU model device could be designed
to use PASID for second level translation (classical DMA translation)
as well.

Yeah, we have the same problem on amdgpu.

We assign PASIDs to clients even when IOMMU isn't present in the system 
just because we need it for debugging.

E.g. when the hardware detects that some shader program is doing 
something nasty we get the PASID in the interrupt and could for example 
use it to inform the client about the fault.

Regards,
Christian.

Best regards,
Lu Baolu