[PATCH v7 6/7] bnxt_en: Eliminate duplicate barriers on weakly-ordered archs
From: michael.chan@broadcom.com (Michael Chan)
Date: 2018-03-25 20:24:15
Also in:
linux-arm-msm, lkml, netdev
From: michael.chan@broadcom.com (Michael Chan)
Date: 2018-03-25 20:24:15
Also in:
linux-arm-msm, lkml, netdev
On Sun, Mar 25, 2018 at 7:39 AM, Sinan Kaya [off-list ref] wrote:
Code includes wmb() followed by writel(). writel() already has a barrier on some architectures like arm64. This ends up CPU observing two barriers back to back before executing the register write. Create a new wrapper function with relaxed write operator. Use the new wrapper when a write is following a wmb(). Since code already has an explicit barrier call, changing writel() to writel_relaxed(). Also add mmiowb() so that write code doesn't move outside of scope.
This line in the patch description is not needed anymore. Other than that, Acked-by: Michael Chan <michael.chan@broadcom.com> Thanks.
Signed-off-by: Sinan Kaya <redacted>