Hi Baruch,
On mer., f?vr. 14 2018, Baruch Siach [off-list ref] wrote:
Hi Gregory,
On Wed, Feb 14, 2018 at 11:42:52AM +0100, Gregory CLEMENT wrote:
quoted
On mer., janv. 31 2018, Baruch Siach [off-list ref] wrote:
quoted
The CP110 component has 4 uart peripherals. All of them use the same clock
gate for slow peripherals that is shared with the i2c and spi peripherals.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Applied on mvebu/dt64
Thanks.
What about patch 2/2 in this series?
I thought I applied it, but now it's done.
Gregory
baruch
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Gregory Clement, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
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