Hi,

Certain clock settings on the dra76x SoC need to be latched for them
to be properly programmed to the PRCM. For example, the setting for
the dra76x GMAC DPLL H14 output is programmed via a register under
the system control module, which doesn't get reflected automatically
under the PRCM HW, and the latch bit is provided to synchronize the
setting from SCM towards PRCM.

-Tero

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