On Mon, Feb 05, 2018 at 02:51:43PM +0100, Geert Uytterhoeven wrote:
Hi Sergei,
On Mon, Feb 5, 2018 at 2:48 PM, Sergei Shtylyov
[off-list ref] wrote:
quoted
On 2/5/2018 4:32 PM, Geert Uytterhoeven wrote:
quoted
quoted
The initial R8A77980 SoC device tree including Cortex-A53 CPU, GIC,
timer,
CPG, RST, and SYSC.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <redacted>
Signed-off-by: Sergei Shtylyov <redacted>
Thanks for your patch!
quoted
--- /dev/null
+++ renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi
@@ -0,0 +1,122 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the r8a77980 SoC
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ * Copyright (C) 2018 Cogent Embedded, Inc.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/renesas-cpg-mssr.h>
I think you want to leave out the above #include, as it will go upstream
through a different path (you're already using hardcoded clock numbers,
assuming the same).
I still need CPG_{CORE|MOD}.
You're right. Please ignore my comment.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Thanks, applied.