On 07.02.2018 12:21, Marc Zyngier wrote:

Hi Mikko,

On 06/02/18 07:22, Mikko Perttunen wrote:

quoted

Add the chip-level device tree, including binding headers, for the
NVIDIA Tegra194 "Xavier" system-on-chip. Only a small subset of devices
are initially available, enough to boot to UART console.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
---
 arch/arm64/boot/dts/nvidia/tegra194.dtsi       | 342 +++++++++++++
 include/dt-bindings/clock/tegra194-clock.h     | 664 +++++++++++++++++++++++++
 include/dt-bindings/gpio/tegra194-gpio.h       |  59 +++
 include/dt-bindings/power/tegra194-powergate.h |  49 ++
 include/dt-bindings/reset/tegra194-reset.h     | 166 +++++++
 5 files changed, 1280 insertions(+)
 create mode 100644 arch/arm64/boot/dts/nvidia/tegra194.dtsi
 create mode 100644 include/dt-bindings/clock/tegra194-clock.h
 create mode 100644 include/dt-bindings/gpio/tegra194-gpio.h
 create mode 100644 include/dt-bindings/power/tegra194-powergate.h
 create mode 100644 include/dt-bindings/reset/tegra194-reset.h

diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
new file mode 100644
index 000000000000..dda28d758cab
--- /dev/null
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi

[...]

quoted

+		gic: interrupt-controller at 3881000 {
+			compatible = "arm,gic-400";
+			#interrupt-cells = <3>;
+			interrupt-controller;
+			reg = <0x03881000 0x1000>,
+			      <0x03882000 0x2000>;

You're missing the GICH and GICV regions here.

quoted

+			interrupts = <GIC_PPI 9
+				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+			interrupt-parent = <&gic>;
+		};

Thanks,

	M.

Thanks, fixed.

Mikko