[PATCH v2 2/4] dmaengine: xilinx_dma: properly configure the SG mode bit in the driver for cdma
From: Vinod Koul <hidden>
Date: 2018-01-08 10:51:08
Also in:
dmaengine, lkml
From: Vinod Koul <hidden>
Date: 2018-01-08 10:51:08
Also in:
dmaengine, lkml
On Wed, Jan 03, 2018 at 12:12:09PM +0530, Kedareswara rao Appana wrote:
If the hardware is configured for Scatter Gather(SG) mode, and hardware is idle, in the control register SG mode bit must be set to a 0 then back to 1 by the software, to force the CDMA SG engine to use a new value written to the CURDESC_PNTR register, failure to do so could result errors from the dmaengine.
Applied 2-4, thanks -- ~Vinod