gicv3: 1 of N model implementation related

On Tue, Nov 28, 2017 at 04:42:47PM -0800, ckadabi at codeaurora.org wrote:

Hi Mark:

Hi,

I'm afraid I don't know much about GICv3 or the irq infrastrcuture in
the kernel . Did you mean to ask Marc Zyngier (Cc'd)?

Thanks,
Mark.

I have some question related to gicv3 driver on 1 of N distribution model.
Looking at the linux kernel implementation the interrupt is always affined
to the first online cpu and does not use the 1 of N distribution model.
As per the Gic spec 1 of N model could help to achieve low latency as
handling the interrupts as there are more PE's participating in handling the
interrupt.

Is there a reason the Linux kernel driver does not implement the 1 of N
model?

Thanks,
Channa

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