Re: [PATCH 3/8] ARM: dts: iwg22m: Enable SDHI1 controller

5 messages, 4 authors, 2017-09-21 · open the first message on its own page

Re: [PATCH 3/8] ARM: dts: iwg22m: Enable SDHI1 controller

From: Simon Horman <hidden>
Date: 2017-09-15 08:11:44 

On Wed, Sep 13, 2017 at 06:05:36PM +0100, Chris Paterson wrote:
quoted hunk
From: Fabrizio Castro <redacted>

Enable the SDHI1 controller on iWave RZ/G1E SoM.

Signed-off-by: Fabrizio Castro <redacted>
Signed-off-by: Chris Paterson <redacted>
---
This patch is based on renesas-devel-20170913-v4.13.


 arch/arm/boot/dts/r8a7745-iwg22m.dtsi | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
index e306e7c..f7f9cef 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
+++ b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
@@ -9,6 +9,7 @@
  */
 
 #include "r8a7745.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 
 / {
 	compatible = "iwave,g22m", "renesas,r8a7745";
@@ -38,6 +39,12 @@
 		function = "mmc";
 	};
 
+	sdhi1_pins: sd1 {
+		groups = "sdhi1_data4", "sdhi1_ctrl";
+		function = "sdhi1";
+		power-source = <3300>;
+	};
+
 	i2c3_pins: i2c3 {
 		groups = "i2c3_b";
 		function = "i2c3";
@@ -54,6 +61,16 @@
 	status = "okay";
 };
 
+&sdhi1 {
+	pinctrl-0 = <&sdhi1_pins>;
+	pinctrl-names = "default";
+
+	vmmc-supply = <&reg_3p3v>;
+	vqmmc-supply = <&reg_3p3v>;
+	cd-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
No wp-gpios property means this is a ?SD slot, right?

Do you have any plans to enable sdr-50 and sdr-104?
Is it not supported for some reason?

I don't mind if its not enabled in this patch but I would like to
know if it can be enabled or not and reflect that information in the wiki.

http://elinux.org/index.php?title=Renesas-MMC-Enabled-Speeds

+	status = "okay";
+};
+
 &i2c3 {
 	pinctrl-0 = <&i2c3_pins>;
 	pinctrl-names = "default";
-- 
1.9.1

RE: [PATCH 3/8] ARM: dts: iwg22m: Enable SDHI1 controller

From: Chris Paterson <hidden>
Date: 2017-09-20 13:05:07 

Hello Simon,

From: devicetree-owner at vger.kernel.org [mailto:devicetree-
owner at vger.kernel.org] On Behalf Of Simon Horman
Sent: 15 September 2017 09:12
To: Chris Paterson <redacted>

On Wed, Sep 13, 2017 at 06:05:36PM +0100, Chris Paterson wrote:
quoted
From: Fabrizio Castro <redacted>

Enable the SDHI1 controller on iWave RZ/G1E SoM.

Signed-off-by: Fabrizio Castro <redacted>
Signed-off-by: Chris Paterson <redacted>
---
This patch is based on renesas-devel-20170913-v4.13.


 arch/arm/boot/dts/r8a7745-iwg22m.dtsi | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
index e306e7c..f7f9cef 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
+++ b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
@@ -9,6 +9,7 @@
  */

 #include "r8a7745.dtsi"
+#include <dt-bindings/gpio/gpio.h>

 / {
 	compatible = "iwave,g22m", "renesas,r8a7745"; @@ -38,6 +39,12
@@
quoted
 		function = "mmc";
 	};

+	sdhi1_pins: sd1 {
+		groups = "sdhi1_data4", "sdhi1_ctrl";
+		function = "sdhi1";
+		power-source = <3300>;
+	};
+
 	i2c3_pins: i2c3 {
 		groups = "i2c3_b";
 		function = "i2c3";
@@ -54,6 +61,16 @@
 	status = "okay";
 };

+&sdhi1 {
+	pinctrl-0 = <&sdhi1_pins>;
+	pinctrl-names = "default";
+
+	vmmc-supply = <&reg_3p3v>;
+	vqmmc-supply = <&reg_3p3v>;
+	cd-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
No wp-gpios property means this is a ?SD slot, right?
Correct

Do you have any plans to enable sdr-50 and sdr-104?
Is it not supported for some reason?
Nope (unless the hardware changes down the line).
Both vmmc and vqmmc are fixed to 3V3 on the iWave-E SOM module.

Kind regards, Chris


I don't mind if its not enabled in this patch but I would like to know if it can be
enabled or not and reflect that information in the wiki.

http://elinux.org/index.php?title=Renesas-MMC-Enabled-Speeds
quoted
+	status = "okay";
+};
+
 &i2c3 {
 	pinctrl-0 = <&i2c3_pins>;
 	pinctrl-names = "default";
--
1.9.1
--
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RE: [PATCH 3/8] ARM: dts: iwg22m: Enable SDHI1 controller

From: Chris Paterson <hidden>
Date: 2017-09-20 13:06:30 

From: Chris Paterson
Sent: 20 September 2017 14:05
quoted
I don't mind if its not enabled in this patch but I would like to know
if it can be enabled or not and reflect that information in the wiki.

http://elinux.org/index.php?title=Renesas-MMC-Enabled-Speeds
Will do.

Chris





  

    
Re: [PATCH 3/8] ARM: dts: iwg22m: Enable SDHI1 controller

    

      From: Simon Horman <horms@verge.net.au>

      Date: 2017-09-21 08:31:16 
    

  

  
On Wed, Sep 20, 2017 at 01:05:07PM +0000, Chris Paterson wrote:
Hello Simon,

quoted
From: devicetree-owner at vger.kernel.org [mailto:devicetree-
owner at vger.kernel.org] On Behalf Of Simon Horman
Sent: 15 September 2017 09:12
To: Chris Paterson <redacted>

On Wed, Sep 13, 2017 at 06:05:36PM +0100, Chris Paterson wrote:
quoted
From: Fabrizio Castro <redacted>

Enable the SDHI1 controller on iWave RZ/G1E SoM.

Signed-off-by: Fabrizio Castro <redacted>
Signed-off-by: Chris Paterson <redacted>
---
This patch is based on renesas-devel-20170913-v4.13.


 arch/arm/boot/dts/r8a7745-iwg22m.dtsi | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
index e306e7c..f7f9cef 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
+++ b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
@@ -9,6 +9,7 @@
  */

 #include "r8a7745.dtsi"
+#include <dt-bindings/gpio/gpio.h>

 / {
 	compatible = "iwave,g22m", "renesas,r8a7745"; @@ -38,6 +39,12
@@
quoted
 		function = "mmc";
 	};

+	sdhi1_pins: sd1 {
+		groups = "sdhi1_data4", "sdhi1_ctrl";
+		function = "sdhi1";
+		power-source = <3300>;
+	};
+
 	i2c3_pins: i2c3 {
 		groups = "i2c3_b";
 		function = "i2c3";
@@ -54,6 +61,16 @@
 	status = "okay";
 };

+&sdhi1 {
+	pinctrl-0 = <&sdhi1_pins>;
+	pinctrl-names = "default";
+
+	vmmc-supply = <&reg_3p3v>;
+	vqmmc-supply = <&reg_3p3v>;
+	cd-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
No wp-gpios property means this is a ?SD slot, right?
Correct

quoted
Do you have any plans to enable sdr-50 and sdr-104?
Is it not supported for some reason?
Nope (unless the hardware changes down the line).
Both vmmc and vqmmc are fixed to 3V3 on the iWave-E SOM module.
Thanks, got it.





  

    
Re: [PATCH 3/8] ARM: dts: iwg22m: Enable SDHI1 controller

    

      From: Simon Horman <horms@verge.net.au>

      Date: 2017-09-21 08:38:17 
    

  

  
On Thu, Sep 21, 2017 at 10:31:16AM +0200, Simon Horman wrote:
On Wed, Sep 20, 2017 at 01:05:07PM +0000, Chris Paterson wrote:
quoted
Hello Simon,

quoted
From: devicetree-owner at vger.kernel.org [mailto:devicetree-
owner at vger.kernel.org] On Behalf Of Simon Horman
Sent: 15 September 2017 09:12
To: Chris Paterson <redacted>

On Wed, Sep 13, 2017 at 06:05:36PM +0100, Chris Paterson wrote:
quoted
From: Fabrizio Castro <redacted>

Enable the SDHI1 controller on iWave RZ/G1E SoM.

Signed-off-by: Fabrizio Castro <redacted>
Signed-off-by: Chris Paterson <redacted>
---
This patch is based on renesas-devel-20170913-v4.13.


 arch/arm/boot/dts/r8a7745-iwg22m.dtsi | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
index e306e7c..f7f9cef 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
+++ b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
@@ -9,6 +9,7 @@
  */

 #include "r8a7745.dtsi"
+#include <dt-bindings/gpio/gpio.h>

 / {
 	compatible = "iwave,g22m", "renesas,r8a7745"; @@ -38,6 +39,12
@@
quoted
 		function = "mmc";
 	};

+	sdhi1_pins: sd1 {
+		groups = "sdhi1_data4", "sdhi1_ctrl";
+		function = "sdhi1";
+		power-source = <3300>;
+	};
+
 	i2c3_pins: i2c3 {
 		groups = "i2c3_b";
 		function = "i2c3";
@@ -54,6 +61,16 @@
 	status = "okay";
 };

+&sdhi1 {
+	pinctrl-0 = <&sdhi1_pins>;
+	pinctrl-names = "default";
+
+	vmmc-supply = <&reg_3p3v>;
+	vqmmc-supply = <&reg_3p3v>;
+	cd-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
No wp-gpios property means this is a ?SD slot, right?
Correct

quoted
Do you have any plans to enable sdr-50 and sdr-104?
Is it not supported for some reason?
Nope (unless the hardware changes down the line).
Both vmmc and vqmmc are fixed to 3V3 on the iWave-E SOM module.
Thanks, got it.
Thanks for the clarification above, I have applied this patch.




    
  

  
    

      

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