[PATCH v2] mmc: renesas_sdhi: Add r8a7743/5 support

-----Original Message-----
From: devicetree-owner at vger.kernel.org [mailto:devicetree-
owner at vger.kernel.org] On Behalf Of Geert Uytterhoeven
Sent: 21 August 2017 12:30
To: Biju Das <redacted>
Cc: Ulf Hansson <redacted>; Rob Herring <robh+dt@kernel.org>;
Mark Rutland [off-list ref]; Wolfram Sang <wsa@the-
dreams.de>; Simon Horman [off-list ref]; Magnus Damm
[off-list ref]; Chris Paterson
[off-list ref]; devicetree at vger.kernel.org; Linux-Renesas
[off-list ref]; linux-arm-kernel at lists.infradead.org;
Linux MMC List [off-list ref]
Subject: Re: [PATCH v2] mmc: renesas_sdhi: Add r8a7743/5 support

Hi Biju,

On Mon, Aug 21, 2017 at 12:38 PM, Biju Das [off-list ref]
wrote:

quoted

Add support for r8a7743/5 SoC. Renesas RZ/G1[ME] (R8A7743/5) SDHI is
identical to the R-Car Gen2 family.

Signed-off-by: Biju Das <redacted>
---
v1->v2
    -Modified the listing SoC's description related to SoC
     with 1 Clock and 2 Clocks

This patch is compiled and tested against linux next tag
next-20170817.

 Documentation/devicetree/bindings/mmc/tmio_mmc.txt | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt

b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
index 4fd8b7a..1e3106e 100644

--- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
+++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt

@@ -15,6 +15,8 @@ Required properties:
                "renesas,sdhi-r7s72100" - SDHI IP on R7S72100 SoC
                "renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
                "renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC
+               "renesas,sdhi-r8a7743" - SDHI IP on R8A7743 SoC
+               "renesas,sdhi-r8a7745" - SDHI IP on R8A7745 SoC
                "renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
                "renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC
                "renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC @@
-33,10 +35,9 @@ Required properties:
          If 2 clocks are specified by the hardware, you must name them as
          "core" and "cd". If the controller only has 1 clock, naming is not
          required.
-         Below is the number clocks for each supported SoC:
-          1: SH73A0, R8A73A4, R8A7740, R8A7778, R8A7779, R8A7790
-             R8A7791, R8A7792, R8A7793, R8A7794, R8A7795, R8A7796
-          2: R7S72100
+         Most supported SoCs only have 1 clock. Devices which have
+ more

That is actually mentioned in the paragraph above:

- clocks: Most controllers only have 1 clock source per channel. However, on
          some variations of this controller, the internal card detection
          logic that exists in this controller is sectioned off to be run by a
          separate second clock source to allow the main core clock to be turned
          off to save power.

so I suggest just integrating the (short) list in that paragraph.

quoted

+         than 1 clock are listed below:
+         2: R7S72100"

Bogus trailing double quote.

Thanks. I will send v3 with above changes.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-
m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
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