[PATCH 2/5] mmc: sdhci: Add quirk to indicate MMC_RSP_136 has CRC
From: adrian.hunter@intel.com (Adrian Hunter)
Date: 2017-08-28 08:04:08
Also in:
linux-devicetree, linux-mmc, linux-omap, lkml
On 21/08/17 10:41, Kishon Vijay Abraham I wrote:
TI's implementation of sdhci controller used in DRA7 SoC's has CRC in responses with length 136 bits. Add quirk to indicate the controller has CRC in MMC_RSP_136. If this quirk is set sdhci library shouldn't shift the response present in SDHCI_RESPONSE register. Signed-off-by: Kishon Vijay Abraham I <redacted>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
quoted hunk ↗ jump to hunk
--- drivers/mmc/host/sdhci.c | 3 +++ drivers/mmc/host/sdhci.h | 2 ++ 2 files changed, 5 insertions(+)diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index ba639b7851cb..9c8d7428df3c 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c@@ -1182,6 +1182,9 @@ static void sdhci_read_rsp_136(struct sdhci_host *host, struct mmc_command *cmd) cmd->resp[i] = sdhci_readl(host, reg); } + if (host->quirks2 & SDHCI_QUIRK2_RSP_136_HAS_CRC) + return; + /* CRC is stripped so we need to do some shifting */ for (i = 0; i < 4; i++) { cmd->resp[i] <<= 8;diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 399edc681623..54bc444c317f 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h@@ -435,6 +435,8 @@ struct sdhci_host { #define SDHCI_QUIRK2_ACMD23_BROKEN (1<<14) /* Broken Clock divider zero in controller */ #define SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN (1<<15) +/* Controller has CRC in 136 bit Command Response */ +#define SDHCI_QUIRK2_RSP_136_HAS_CRC (1<<16) int irq; /* Device IRQ */ void __iomem *ioaddr; /* Mapped address */