[PATCH v3 03/10] arm64: dts: hi3660: add pmu dt node for hi3660
From: Guodong Xu <hidden>
Date: 2017-08-14 09:52:20
Also in:
linux-devicetree, lkml
Subsystem:
arm/hisilicon soc support, the rest · Maintainers:
Wei Xu, Linus Torvalds
From: YiPing Xu <redacted> Add pmu dt node for hi3660 Signed-off-by: YiPing Xu <redacted> Signed-off-by: Zhong Kaihua <redacted> Signed-off-by: Leo Yan <redacted> Tested-by: Jumana Mundichipparakkal <redacted> --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 1cdd03b..5fd5686 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi@@ -202,6 +202,26 @@ IRQ_TYPE_LEVEL_HIGH)>; }; + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&cpu0>, + <&cpu1>, + <&cpu2>, + <&cpu3>, + <&cpu4>, + <&cpu5>, + <&cpu6>, + <&cpu7>; + }; + timer { compatible = "arm,armv8-timer"; interrupt-parent = <&gic>;
--
2.10.2