[PATCH 2/2] dmaengine: qcom_hidma: correct channel QOS register offset
From: Sinan Kaya <hidden>
Date: 2017-07-16 14:31:05
Also in:
linux-arm-msm, lkml
Subsystem:
arm/qualcomm mailing list, dma generic offload engine subsystem, qualcomm hidma driver, the rest · Maintainers:
Vinod Koul, Sinan Kaya, Linus Torvalds
A regression was found while testing QOS with different channels. The QOS register offset is 0x700 rather than 0x300. Signed-off-by: Sinan Kaya <redacted> --- drivers/dma/qcom/hidma_mgmt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/qcom/hidma_mgmt.c b/drivers/dma/qcom/hidma_mgmt.c
index d51cd34..c45e244 100644
--- a/drivers/dma/qcom/hidma_mgmt.c
+++ b/drivers/dma/qcom/hidma_mgmt.c@@ -28,7 +28,7 @@ #include "hidma_mgmt.h" -#define HIDMA_QOS_N_OFFSET 0x300 +#define HIDMA_QOS_N_OFFSET 0x700 #define HIDMA_CFG_OFFSET 0x400 #define HIDMA_MAX_BUS_REQ_LEN_OFFSET 0x41C #define HIDMA_MAX_XACTIONS_OFFSET 0x420
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1.9.1