[PATCH v2 5/8] iommu/io-pgtable-arm: Support lockless operation

On Tue, Jun 27, 2017 at 10:41:55AM +0530, Linu Cherian wrote:

On Fri Jun 23, 2017 at 05:04:05PM +0530, Linu Cherian wrote:

quoted

On Fri Jun 23, 2017 at 11:35:25AM +0100, Robin Murphy wrote:

quoted

Note that on a coherent platform like ThunderX that's as good as just
deleting it, because you'll never execute the case below. However, on
reflection I think it can at least safely be downgraded to dma_wmb()
(i.e. DMB) rather than a full DSB - would you be able to test what
difference that makes?

The testing was done on Thunderx 1, which has a non coherent page table walk.
Yes, downgrading to dma_wmb() helps. With this change, performance is back to v1.

Should i send a patch for this ?

I already did it:

https://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git/commit/?h=for-joerg/arm-smmu/updates&id=77f3445866c39d8866b31d8d9fa47c7c20938e05

Will