[PATCH 12/19] drm/sun4i: hdmi: Support the DDC clock in the A31's HDMI controller
From: Chen-Yu Tsai <hidden>
Date: 2017-06-02 10:10:17
Also in:
dri-devel, linux-clk, linux-devicetree
Subsystem:
drm drivers, drm drivers and misc gpu patches, drm drivers for allwinner a10, the rest · Maintainers:
David Airlie, Simona Vetter, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Chen-Yu Tsai, Linus Torvalds
Possibly related (same subject, not in this thread)
- 2017-06-02 · Re: [PATCH 12/19] drm/sun4i: hdmi: Support the DDC clock in the A31's HDMI controller · Maxime Ripard <hidden>
On the A31, the HDMI DDC block is different from the one in the other SoCs. As far as the DDC clock goes, it has no pre-divider, as it is clocked from a slower parent clock, not the TMDS clock. The divider offset from the register value is different. And the clock control register is at a different offset. This patch adds support for this variant. Signed-off-by: Chen-Yu Tsai <redacted> --- drivers/gpu/drm/sun4i/sun4i_hdmi.h | 1 + drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c | 11 +++++++++++ 2 files changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi.h b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
index 08c514672fd3..c39c2a245339 100644
--- a/drivers/gpu/drm/sun4i/sun4i_hdmi.h
+++ b/drivers/gpu/drm/sun4i/sun4i_hdmi.h@@ -178,6 +178,7 @@ struct sun4i_hdmi { }; int sun4i_ddc_create(struct sun4i_hdmi *hdmi, struct clk *clk); +int sun6i_ddc_create(struct sun4i_hdmi *hdmi, struct clk *clk); int sun4i_tmds_create(struct sun4i_hdmi *hdmi); int sun6i_tmds_create(struct sun4i_hdmi *hdmi);
diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c b/drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c
index 9a6b6243e977..b1395e7b242c 100644
--- a/drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c
+++ b/drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c@@ -151,3 +151,14 @@ int sun4i_ddc_create(struct sun4i_hdmi *hdmi, struct clk *parent) { return _sun4i_ddc_create(hdmi, parent, &sun4i_variant); } + +static const struct sun4i_ddc_variant sun6i_variant = { + .reg_offset = SUN6I_HDMI_DDC_CLK_REG, + .pre_divider = 1, + .m_offset = 2, +}; + +int sun6i_ddc_create(struct sun4i_hdmi *hdmi, struct clk *parent) +{ + return _sun4i_ddc_create(hdmi, parent, &sun6i_variant); +}
--
2.11.0