Thread (20 messages) 20 messages, 6 authors, 2017-07-24
STALE3259d

[PATCH 5/8] arm64: dts: allwinner: a64: add SCPI DVFS nodes

From: andre.przywara@arm.com (Andre Przywara)
Date: 2017-06-30 10:01:40
Also in: linux-devicetree, lkml
Subsystem: arm/allwinner sunxi soc support, the rest · Maintainers: Chen-Yu Tsai, Jernej Skrabec, Samuel Holland, Linus Torvalds

One functionality provided by the SCPI handler is frequency scaling,
which allows to switch the one CPU cluster between several operating
points, each specifying a matching frequency and CPU voltage.
The actual table is specified in firmware and can be queried by Linux
using standardised SCPI calls.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index ef6f10e..58c3675 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -61,6 +61,7 @@
 			device_type = "cpu";
 			reg = <0>;
 			enable-method = "psci";
+			clocks = <&scpi_dvfs 0>;
 		};
 
 		cpu1: cpu at 1 {
@@ -68,6 +69,7 @@
 			device_type = "cpu";
 			reg = <1>;
 			enable-method = "psci";
+			clocks = <&scpi_dvfs 0>;
 		};
 
 		cpu2: cpu at 2 {
@@ -75,6 +77,7 @@
 			device_type = "cpu";
 			reg = <2>;
 			enable-method = "psci";
+			clocks = <&scpi_dvfs 0>;
 		};
 
 		cpu3: cpu at 3 {
@@ -82,6 +85,7 @@
 			device_type = "cpu";
 			reg = <3>;
 			enable-method = "psci";
+			clocks = <&scpi_dvfs 0>;
 		};
 	};
 
@@ -148,6 +152,17 @@
 		compatible = "arm,scpi";
 		mboxes = <&mailbox 0>;
 		shmem = <&cpu_scp_mem>;
+
+		scpi-clocks {
+			compatible = "arm,scpi-clocks";
+
+			scpi_dvfs: scpi_dvfs_clocks {
+				compatible = "arm,scpi-dvfs-clocks";
+				#clock-cells = <1>;
+				clock-indices = <0>;
+				clock-output-names = "cpu_clk";
+			};
+		};
 	};
 
 	soc {
-- 
2.9.0
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