Thread (2 messages) 2 messages, 2 authors, 2017-06-22
STALE3286d

[PATCH v3] drm: mediatek: change the variable type of rdma threshold

From: Bibby Hsieh <hidden>
Date: 2017-06-22 02:43:40
Also in: dri-devel, linux-mediatek, lkml
Subsystem: drm drivers, drm drivers for mediatek, the rest · Maintainers: David Airlie, Simona Vetter, Chun-Kuang Hu, Philipp Zabel, Linus Torvalds

For some greater resolution, the rdma threshold
variable will overflow.

Signed-off-by: Bibby Hsieh <redacted>
---
 drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
index 0df05f9..8540aaa 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
@@ -109,7 +109,7 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp, unsigned int width,
 			    unsigned int height, unsigned int vrefresh,
 			    unsigned int bpc)
 {
-	unsigned int threshold;
+	unsigned long long threshold;
 	unsigned int reg;
 
 	rdma_update_bits(comp, DISP_REG_RDMA_SIZE_CON_0, 0xfff, width);
@@ -121,10 +121,11 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp, unsigned int width,
 	 * output threshold to 6 microseconds with 7/6 overhead to
 	 * account for blanking, and with a pixel depth of 4 bytes:
 	 */
-	threshold = width * height * vrefresh * 4 * 7 / 1000000;
+	threshold = div_u64((unsigned long long)width * height * vrefresh *
+			    4 * 7, 1000000);
 	reg = RDMA_FIFO_UNDERFLOW_EN |
 	      RDMA_FIFO_PSEUDO_SIZE(SZ_8K) |
-	      RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold);
+	      RDMA_OUTPUT_VALID_FIFO_THRESHOLD(clamp_val(threshold, 0, 0x3ff0));
 	writel(reg, comp->regs + DISP_REG_RDMA_FIFO_CON);
 }
 
-- 
1.9.1
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