[PATCH v5 1/3] clk: imx7d: create clocks behind rawnand clock gate
From: festevam@gmail.com (Fabio Estevam)
Date: 2017-06-06 16:33:45
Also in:
linux-clk, linux-devicetree, lkml
From: festevam@gmail.com (Fabio Estevam)
Date: 2017-06-06 16:33:45
Also in:
linux-clk, linux-devicetree, lkml
On Tue, Jun 6, 2017 at 3:30 AM, Stefan Agner [off-list ref] wrote:
The rawnand clock gate gates two clocks, NAND_USDHC_BUS_CLK_ROOT and NAND_CLK_ROOT. However, the gate has been in the chain of the latter only. This does not allow to use the NAND_USDHC_BUS_CLK_ROOT only, e.g. as required by APBH-Bridge-DMA. Add new clocks which represent the clock after the gate, and use a shared clock gate to correctly model the hardware. Signed-off-by: Stefan Agner <stefan@agner.ch>
Tested-by: Fabio Estevam <redacted>