Thread (11 messages) 11 messages, 6 authors, 2017-06-06

[v6 2/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #74

From: Hanjun Guo <hidden>
Date: 2017-06-06 09:38:49
Also in: linux-acpi, linux-iommu, lkml

On 2017/5/17 18:13, Shameerali Kolothum Thodi wrote:
quoted
  #ifdef CONFIG_ACPI
+static void acpi_smmu_get_options(u32 model, struct arm_smmu_device
+*smmu) {
+	if (model == ACPI_IORT_SMMU_CAVIUM_CN99XX)
+		smmu->options |= ARM_SMMU_OPT_PAGE0_REGS_ONLY;
 >
HiSIlicon hip06/07 boards have a similar existing option to enable,
ARM_SMMU_OPT_SKIP_PREFETCH. I have just sent out a similar patch to enable
It-" [PATCH] iommu/arm-smmu-v3: Enable ACPI based HiSilicon CMD_PREFETCH
  quirk(erratum 161010701)".  May be it can be merged here, if this series goes through.
  Not sure about the protocol though.
I think you can add a patch on top of Geetha's, and clarify
the dependency in the change log, then it will be easy for
maintainer to apply.

Thanks
Hanjun
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