[PATCH v7 12/13] ARM: sun8i: v3s: add pinmux for LCD pins of V3s SoC
From: icenowy@aosc.io (Icenowy Zheng)
Date: 2017-05-14 16:33:16
Also in:
dri-devel, linux-clk, linux-devicetree, lkml
Subsystem:
the rest · Maintainer:
Linus Torvalds
Allwinner V3s SoC features a set of pins that have functionality of RGB LCD, the pins are at different pin ban than other SoCs. Add pinctrl node for them. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Chen-Yu Tsai <redacted> --- Changes in v7: - Dropped the trailing "@0" in rgb666 pinmux node name. - Added Chen-Yu's ACK. arch/arm/boot/dts/sun8i-v3s.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index b71b35734515..a7026517ed99 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi@@ -297,6 +297,15 @@ function = "i2c0"; }; + lcd_rgb666_pins: lcd_rgb666 { + pins = "PE0", "PE1", "PE2", "PE3", "PE4", + "PE5", "PE6", "PE7", "PE8", "PE9", + "PE10", "PE11", "PE12", "PE13", "PE14", + "PE15", "PE16", "PE17", "PE18", "PE19", + "PE23", "PE24"; + function = "lcd"; + }; + uart0_pins_a: uart0 at 0 { pins = "PB8", "PB9"; function = "uart0";
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2.12.2