On Mon, Mar 27, 2017 at 09:35:33PM +1100, Matt Flax wrote:

In this case, there is the TDM (DSP mode) protocol on the Codec. The SoC
however is communicating in channel pairs {{0, 1}, {2, 3}, {4, 5}, {6, 7}}.
Each channel separated by the PCM_FS clk leading edge.

As far as the codec is concerned it is DSP mode. As far as the SoC is
concerned, it is not I2S, nor is it strictly DSP mode because there is more
then one PCM_FS per frame !

If we look at this from the perspective of the Codec, then it is DSP mode. I
am just not sure what to call the SoC's protocol, other then multi-paired
PCM.

This isn't DSP mode from anything's point of view, the extra frame syncs
mean it's a whole new format.  Off the top of my head I'd suggest just
running it as stereo DSP mode from a kernel point of view and fixing
things up in userspace.
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